CPU Architect
Overview
We are looking for a CPU Architect to lead Quintauris’ definition of embedded-class processor requirements. You will define ISA and memory system profiles, capture integration requirements, and drive platform-level specifications that guide IP selection and ecosystem partnerships. In this role, you will represent Quintauris in RISC-V International standardisation, align with shareholder needs, and collaborate with internal teams to ensure our specifications reflect real-world requirements. This is a role focused on specification and qualification - not IP design - and will be central to shaping the foundation of our platforms.
Specific Skills
- Analytical and requirements-driven mindset
- Clear communicator, able to work across technical and strategic stakeholders
- Strong collaboration and consensus-building skills
- Ability to influence and align ecosystem partners
Responsible For
- Profile & Platform Definition: Define ISA subsets, privilege models, memory system requirements, and integration rules for embedded-class processors.
- Standardisation: Represent Quintauris in RISC-V International (RVI) technical groups and task forces, contributing to profile and platform specifications.
- Requirements Capture: Work with shareholders, ecosystem partners, and internal teams to gather and prioritise CPU requirements.
- IP Qualification: Define qualification criteria for IP selection and partnership, ensuring compliance with Quintauris profiles and system needs.
- Collaboration: Work closely with the performance team, software team, and verification architects to ensure coverage of system-level requirements.
- Ecosystem Engagement: Act as a technical interface to CPU IP vendors, ensuring partner roadmaps align with Quintauris and shareholder needs.
- Documentation: Drive the creation of clear specifications and requirement documents for CPU integration into Quintauris platforms.
Additional Requirements
- Experience: 8+ years in CPU architecture, embedded systems, or SoC definition.
- ISA Knowledge: Deep understanding of the RISC-V ISA, privilege models, and compliance processes.
- System Experience: Familiarity with memory systems, interrupt architectures, and embedded-class integration requirements.
- Standards Work: Experience contributing to or working with industry standardisation bodies.
- Collaboration: Strong track record of working across hardware, software, and performance teams.
- Breadth: Understanding of real-time and embedded-class CPUs (safety, MCUs, domain controllers).
- Stakeholder Alignment: Ability to translate shareholder and partner needs into actionable specifications.
Job Nature
Full Time
Job Location
Granada (ES), Munich (DE), Remote (DE or ES)
Benefits
At Quintauris, we believe great work happens when people are trusted, supported, and empowered. Here’s how we make it possible:
- Hybrid work model
- 30 days of paid vacation – Recharge, travel, or simply enjoy more time off.
- Flexible schedule – You own your time; you set the rhythm.
- Annual wellness benefit – Invest in your health and well-being with our dedicated allowance.
- Trust and autonomy – We focus on outcomes.
- Global impact – Be part of a team shaping the future of processors and the open RISC-V ecosystem.