Hardware Verification Architect

Hardware Verification Architect

Overview

We are looking for a hands-on Hardware Verification Architect to define and drive CPU validation and architecture compliance at Quintauris. You will architect testbench infrastructure, define stimulus and compliance requirements, and guide verification methodology across processor types. In this role, you will focus on building capabilities and mentoring junior engineers, while our services team executes large-scale regressions and day-to-day validation. 

Specific Skills
  • Experience: 8+ years in CPU verification, validation, or testbench development. 
  • Technical Expertise: Strong background in SystemVerilog/UVM, ISA test generation (C/assembly), scripting (Python/Perl). 
  • ISA Knowledge: Deep understanding of the RISC-V ISA and compliance methodologies. 
  • Infrastructure: Proven track record in architecting reusable verification infrastructures. 
  • Breadth: Familiarity with real-time cores, microcontrollers, and application-class CPUs. 
  • Debugging: Excellent problem-solving skills across RTL, ISA, and software stack interactions. 
  • Leadership: Ability to mentor junior engineers and align execution teams effectively. 
Responsible For
  • Methodology & Compliance: Define CPU validation methodology, architecture compliance requirements, and coverage strategy. 
  • Infrastructure Development: Architect and develop the Quintauris Testbench (QNTB) for integration with partner IP. 
  • Stimulus & Testcases: Prototype stimulus flows and compliance testcases to qualify ISA and architectural features. 
  • Framework Integration: Select and qualify third-party and open-source compliance/verification frameworks. 
  • Debug & Resolution: Debug complex system-level and architectural failures, providing guidance to execution teams. 
  • Team Leadership: Mentor junior verification engineers working on capability and infrastructure development. 
  • Collaboration: Work closely with CPU architects, system engineers, and software teams to ensure full-stack validation. 
  • SME Role: Act as the subject-matter expert interface toward the services verification/validation team. 
Additional Requirements
  • Problem-solving mindset with a focus on first-principle thinking 
  • Strong communication and mentoring skills 
  • Ability to collaborate across disciplines and partner teams 
  • Self-driven and comfortable in a fast-paced environment 
Job Nature
Full Time
Job Location
Granada (ES), Munich (DE), Remote (DE or ES)
Benefits
At Quintauris, we believe great work happens when people are trusted, supported, and empowered. Here’s how we make it possible: 
  • Hybrid work model  
  • 30 days of paid vacation – Recharge, travel, or simply enjoy more time off. 
  • Flexible schedule – You own your time; you set the rhythm. 
  • Annual wellness benefit – Invest in your health and well-being with our dedicated allowance. 
  • Trust and autonomy – We focus on outcomes. 
  • Global impact – Be part of a team shaping the future of processors and the open RISC-V ecosystem. 
Quintauris is at the forefront of innovation, accelerating the adoption of RISC-V solutions for the next generation of hardware. As a young, dynamic company, we’re building a collaborative team passionate about shaping the future of technology. Check here the values that drive us on our mission to industrialize RISC-V. 
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